keynote speakers
One of the highlights of the upcoming ICT conference is the lineup of esteemed keynote speakers who will be sharing their insights and experiences on the latest trends and developments in the field. These experts are at the forefront of their respective areas, and their presentations will provide attendees with valuable information and inspiration. Among the keynote speakers at the conference, you can expect to hear from:
Carlos R. del Blanco
Universidad Politécnica de Madrid
Carlos R. del Blanco
PhD in Telecommunications Engineering, Universidad Politécnica de Madrid
ABSTRACT
Visual Foundation Models (VFMs) are large-scale models trained on vast image and video datasets to learn general-purpose visual representations that can be transferred across many downstream tasks. By leveraging self-supervised, contrastive, and multimodal learning strategies, these models capture rich semantic, spatial, and contextual information without requiring extensive task-specific annotation. VFMs have significantly advanced areas such as image classification, object detection, segmentation, retrieval, and action recognition, while also enabling stronger integration between vision and language. Their adaptability, scalability, and ability to generalize across domains make them a key building block for modern computer vision systems and multimodal artificial intelligence.
BIOGRAPHY
Dr. Carlos R. del Blanco (ORCID: 0000-0003-0618-3488) received the Telecommunication Engineering degree and the Ph.D. degree in Telecommunication, both from the UPM, in 2005 and 2011, respectively. Since 2005 he is a member of the GTI- UPM. In addition, since 2021 he is a member of the faculty of the E.T.S. Ingenieros de Telecomunicación as Associate Professor of Signal Theory and Communications at the Department of Signals, Systems, and Communications. He is co-author of numerous articles in relevant international journals, peer-reviewed international conferences and journals, and holds three patents. He has participated in the creation of several open access datasets. He is co-author of the IEEE International Award for the Best Paper of the Year in the Transactions on Consumer Electronics Journal, 2017 and co-winner of the 2018 ImageCLEFlifelog Challenge: Lifelog Moment Retrieval (LMRT), organized by ImageCLEF / LifeCLEF – Multimedia Retrieval in CLEF. He has participated in 20+ European and Spanish research projects financed in competitive public calls. He has been IP of public and private R&D projects. He has also been the scientific technical coordinator of several competitive projects. Also, he has participated in several international and national contract-research projects. His professional interests include artificial intelligence and machine learning, signal and image processing, computer vision, pattern recognition, and stochastic dynamic models.
TOPIC: Visual Foundation Models and Applications
Fernando Corinto
Politecnico di Torino
Fernando Corinto
Full Professor of Electrical Engineering in the Department of Electronics and Telecommunications at Politecnico di Torino, Italy
Fernando Corinto is a Full Professor of Electrical Engineering in the Department of Electronics and Telecommunications at Politecnico di Torino, Italy. He received his master’s degree in electronic engineering in 2001 and his Ph.D. in Electronics and Communications Engineering in 2005, along with a European Doctorate Certification, all from Politecnico di Torino . His research spans nonlinear dynamical circuits and systems, cognitive neural networks, artificial intelligence, and memristor nanotechnology, where he has made influential contributions to both theoretical foundations and technological innovation. He is the co‑author of four books, ten book chapters, and more than 190 peer‑reviewed publications, and he holds three patents reflecting the impact of his work in technology transfer.
Prof. Corinto is a Senior Member of IEEE and has served the Circuits and Systems community in several leadership roles, including Chair of the IEEE CAS Technical Committee on Cellular Nanoscale Networks and Array Computing and Vice‑Chair of the IEEE North Italy CAS Chapter. He has also contributed as Associate Editor of IEEE Transactions on Circuits and Systems I and as Editorial Board Member of the International Journal of Circuit Theory and Applications since 2015 . His commitment to international collaboration is reflected in his roles as Vice Chair of the COST Action MemoCiS and in prestigious visiting positions, including DRESDEN Senior Fellow at TU Dresden and August‑Wilhelm Scheer Visiting Professor at TU München. His scientific impact has been recognized globally, including his inclusion in Stanford University’s 2024 list of the “World’s Top 2%” scientists.
ABSTRACT
Nonlinear oscillators exhibit remarkably rich dynamics, enabling computational paradigms that extend beyond the capabilities of conventional von Neumann architectures. Networks of such oscillators have been leveraged for tasks ranging from pattern recognition to solving hard combinatorial problems, and – under the principles of local activity and the edge of chaos – they can even generate chaotic behaviour. Yet the practical integration of nonlinear oscillator circuits has long been constrained by the absence of scalable, low‑power device technologies.
Nonvolatile memristive devices offer a compelling solution, providing intrinsic nonlinear characteristics that support complex dynamical behaviours, including periodic oscillations and chaos. In this invited talk, I will present a framework for the physical realization of a tuneable memristor‑based Chua’s circuit. The design exploits a nonvolatile memristive element to supply the required nonlinear conductance and to enable programmable selection – via bifurcation control – among multiple oscillatory regimes. I will outline circuit design guidelines derived from Hopf bifurcation conditions to ensure robust periodic oscillations, followed by the experimental implementation according to detailed device characterization and modelling. The resulting circuit demonstrates the ability to generate distinct oscillation patterns simply by programming the memristor state. I will conclude by discussing how these insights translate into broader device-level requirements for future scalable implementations of nonlinear dynamical hardware.